Terasic - Robust hardware design platform built around Altera’s SoC FPGA (DE0-Nano-SoC)

Terasic's DE0-Nano-SoC development kit features high-speed DDR3 memory, analog-to-digital capabilities, and Ethernet networking. The DE0-Nano-SoC development kit provides a powerful hardware design platform built on Altera's System-on-Chip (SoC) FPGAs. This platform combines the latest dual-core ARM Cortex-A9 embedded core with industry-leading programmable logic, thereby Achieved ultimate design flexibility. Users can now take advantage of powerful reconfigurability with high-performance, low-power processor systems. Altera's SoC integrates an ARM-based hard processor system (HPS). The system consists of a processor, peripherals, and memory interfaces. The interface uses a high-bandwidth interconnect backbone network to seamlessly bind to the FPGA architecture. The DE0-Nano-SoC development board is equipped with high-speed DDR3 memory, analog-to-digital functions, Ethernet networking and more to meet the needs of many exciting applications. The company said that the DE0-Nano-SoC development kit contains all the tools needed to use the development board with a computer running Microsoft Windows XP or later.