Date de Parution: 2017-12-28
The development of 5nm chip models has become the focus of many semiconductor companies. Electronics designers have developed and designed technologies that will ensure significant energy efficiency and equipment performance.
Compared to the enthusiasm of engineers in the 5nm field, these cautious coffee buyers worry about their funding sources not only in terms of technology, but also in terms of production and unprofitability. 5 nm
But even if 5 nanometers of labor is saved, the newly discovered inventory is in good condition, but the fact is that long-term mass production is less expensive and cost-effective, and IBM is a good example. Big Blue joins Samsung and GlobalFoundries. Process development up to 5 nanometers, including the use of a continuous transistor gate (GAAFET) capsule material gate with three horizontal nano robots. This is a direct comparison of FinFET vertical configuration.
IBM is at least optimistic about the advantages of 5nm devices, and said that the chips used in this process can improve performance by 40% when stacked with existing 10nm devices. In terms of energy consumption for household appliances, the company has saved up to 75% of its energy.
However, 5nm devices are not expected to appear anytime soon. It only takes a few years to make money from technology. But other events will happen, which will lead to widespread adoption of 5nm.
An interesting example from the Imec Nanotechnology Center recently demonstrated vertical transistors in a vertical silicon wafer (GAA) and has applied an improved CMOS process to integrated transistors. Ring oscillators mean Imec is a technology up to 5nm.
